Semiconductor & Chip Industry — 2026年7月13日 週次レポート
重要な発見
エグゼクティブサマリー（5件）
- •The semiconductor industry is simultaneously experiencing a demand-side recovery — two consecutive months of strong sales growth — and a supply-side architectural reckoning, with lateral HBM stacking, 2D-material transistors, and diverging transistor roadmaps signaling the post-FinFET era is no longer theoretical but actively contested.
- •AI infrastructure investment is globalizing at speed: India's $17.2B semiconductor project approvals, AMD's £2B UK commitment, NVIDIA's sovereign AI factory deployments across multiple continents, and the EU Chips Act 2.0 collectively demonstrate that AI semiconductor demand is now a fixture of national industrial policy, not merely a hyperscaler procurement cycle.
- •The competitive landscape is reshaping across all tiers simultaneously — Samsung's foundry returning to profitability eases investment constraints, NVIDIA extends its moat through software compounding rather than hardware alone, and AMD is mirroring NVIDIA's national AI strategy playbook to compete for government-backed infrastructure contracts.
- •Memory architecture is approaching a structural inflection: a typical AI accelerator already pairs with eight HBM stacks each 12 dies high, and even HBM4's 2,800 GB/s bandwidth is described as insufficient for frontier models — making lateral stacking research not an academic curiosity but a near-term engineering imperative for the AI compute stack.
- •Industrial policy and private capital are entering a self-reinforcing feedback loop: measurable equipment spending increases, CHIPS Act disbursements, EU Chips Act 2.0 formalization, and record memory equipment investment projections are providing governments with empirical evidence that policy interventions generate private capital formation, likely sustaining policy support through the current legislative cycle.
今回の要点（15件）
- 1.Global semiconductor sales rose 9.2% month-to-month in May 2026, following an 11% month-to-month increase in April 2026, confirming a sustained demand recovery corroborated by both the SIA and WSTS Blue Book data [17] [7].
- 2.At the IEEE VLSI Symposium, two competing lateral HBM stacking designs were presented: South Korean researchers' V-Die predicts an 82% speed boost over HBM4 and 540 tokens/second versus 296 for HBM4 on a GPT3-sized workload, while Japan's MOSAIC targets twice HBM4's memory capacity with less than 1°C additional peak temperature [3].
- 3.Samsung's foundry division posted its first monthly profit in three years, a significant competitive milestone that could reduce financial pressure constraining advanced node investment, as reported by AnySilicon on 2026-07-10 [2].
- 4.Samsung began mass production of the PM1763 SSD optimized for next-generation AI infrastructure on 2026-07-08, extending its storage push into the data center AI segment [1] (company announcement — may reflect promotional framing).
- 5.NVIDIA introduced the Vera CPU as a new 'max single-threaded CPU at scale' category for agentic AI workloads, featuring the Olympus core delivering 50% higher instructions per cycle than NVIDIA Grace, up to 1.2 TB/s LPDDR5X memory bandwidth, and 3.4 TB/s core-to-core bandwidth; Perplexity tested Vera completing a real coding workflow approximately 1.5x faster than x86 [8] (company announcement — may reflect promotional framing).
- 6.NVIDIA's Blackwell inference software stack reduced token costs by up to 5x on DeepSeek V4 in one month, with stacked optimizations — disaggregated serving, large expert parallelism, NVFP4, and multi-token prediction — increasing throughput by up to 20x [9] (company announcement — may reflect promotional framing).
- 7.AMD committed up to £2 billion to accelerate AI innovation and research in the United Kingdom, announced a strategic collaboration with Imperial College London for sovereign AI infrastructure, signed a definitive agreement with Rackspace Technology for 30 MW of AMD AI compute, and was named 'Current Company to Beat' in the Gartner AI Vendor Race [12] (company announcement — may reflect promotional framing).
- 8.ASML, TSMC, and imec achieved 2D-material transistors (MoS2, WS2, WSe2) at 50nm contacted poly pitch on 300mm wafers with 94% operational transistors in a CMOS-like integration approach, described as a world first; TSMC's CTO characterized the work as instrumental in pushing the boundaries of semiconductor innovation [13].
- 9.IEEE Spectrum reported that future transistor stacking plans are diverging, with IBM choosing a different path from Intel, Samsung, and TSMC, signaling a period of genuine architectural pluralism beyond FinFET scaling [4].
- 10.India greenlighted 12 semiconductor projects worth $17.2 billion, as AnySilicon reported alongside South Korea's 'all in on AI' stance and a new Dresden power fab launch, illustrating AI semiconductor demand distributing across national infrastructure programs [2].
- 11.NVIDIA's national AI strategies blog documented sovereign AI factory deployments across Europe, Asia, and Latin America, with the NVIDIA AI Nations initiative active since 2019 [11] (company announcement — may reflect promotional framing).
- 12.CHIPS.gov showed no new agreements this period; the previously reported agreements — I-Pulse ($250 million), SandboxAQ ($500 million), Coherent Corp. (up to $50 million), and Powerex ($30 million) — remain the most recent publicly listed disbursements [16].
- 13.JEDEC announced an Industry Forum on AI Memory Architectures, Testing, and Ecosystem Readiness scheduled for Seoul on 2026-10-15, and an Automotive Electronics Forum in Santa Clara on 2026-09-17 [18].
- 14.The European Commission presented Chips Act 2.0 at the SEMI Europe Policy Forum to accelerate semiconductor innovation and investment; imec's NanoIC pilot line is described as a pivotal initiative under the EU Chips Act, with imec's TU/e collaboration explicitly connected to the ChipNL Competence Center and European Chip Design Platform [19] [13].
- 15.Semiconductor Engineering's special report 'Creating A Moore's Law For AI Scaling' and sustained coverage of agentic AI's impact on chip design and verification confirm that R&D model transformation is broadening beyond memory and logic into EDA and IP [20].
市場動向
AI Memory Bottleneck Drives Lateral HBM Stacking Research to Critical Inflection Point
The fundamental constraint on AI accelerator performance is shifting from compute to memory bandwidth and thermal management, and this period saw concrete research milestones that signal the industry is approaching an architectural inflection. At the IEEE VLSI Symposium, two research groups presented competing lateral-stacking approaches to replace conventional vertical HBM stacks: South Korean researchers' V-Die design predicts an 82% speed boost over HBM4 and 540 tokens per second versus 296 f…
Global Semiconductor Sales Recovery Confirmed, With May 2026 Posting 9.2% Month-to-Month Growth
The SIA reported that global semiconductor sales increased 9.2% month-to-month in May 2026, following an 11% month-to-month increase in April 2026. [17] AnySilicon also noted May's 9.2% rise in global semiconductor sales as a headline development. [2] This consecutive monthly growth pattern, reported across both the SIA (a Level 2 source) and AnySilicon (Level 4), indicates a sustained demand recovery rather than a one-month anomaly. The WSTS Blue Book updated through May 2026 provides the under…
AI Chip R&D Cycle Compression Continues as Academia-Industry Feedback Loops Institutionalize
The structural acceleration of semiconductor R&D timelines driven by AI demand, first identified last period with the UCLA $125M hub launch, is now reinforcing across multiple institutions. IEEE Spectrum continued to feature the UCLA Semiconductor Hub — which includes Applied Materials, GlobalFoundries, Meta, Synopsys, and Broadcom — as a model for compressing the academia-to-fab feedback loop, noting that frontier AI models update every few months while semiconductor parts update on 18- to 48-m…
AI Infrastructure Buildout Extends Semiconductor Demand Into New Geographic and Sectoral Frontiers
This period's sources confirm that AI-driven semiconductor demand is expanding geographically and sectorally in ways that create new supply chain requirements. India greenlighted 12 semiconductor projects worth $17.2 billion, and AnySilicon reported this as a headline development alongside South Korea going 'all in on AI' and a new Dresden power fab launch. [2] NVIDIA's blog on national AI strategies documented sovereign AI factory deployments across Europe, Asia, and Latin America, with NVIDIA'…
Transistor Architecture Divergence Accelerates as IBM, Intel, Samsung, and TSMC Choose Different Paths
IEEE Spectrum reported that future transistor stacking plans are starting to diverge, with IBM choosing a different path from Intel, Samsung, and TSMC. [4] This divergence, combined with the ASML, TSMC, and imec collaboration demonstrating 2D-material transistors (MoS2, WS2, WSe2) at 50nm contacted poly pitch on 300mm wafers — described as a world first — signals that the industry is entering a period of genuine architectural pluralism rather than convergence on a single scaling path. [13] Recor…
競合動向
NVIDIA Deepens Platform Lock-In Through Software Stack Compounding and Open Ecosystem Flywheel
NVIDIA's competitive strategy this period is increasingly centered on software compounding rather than hardware alone. The company reported that its Blackwell inference software stack reduced token costs by up to 5x on DeepSeek V4 in just one month, and that stacking optimizations (disaggregated serving, large expert parallelism, NVFP4, multi-token prediction) increases throughput by up to 20x. [9] NVIDIA Nemotron 3 Ultra achieved benchmark-leading performance with LangChain's Deep Agents harnes…
Samsung Foundry Division Reports First Monthly Profit in Three Years, Signaling Potential Turnaround
AnySilicon reported that Samsung's chipmaking division posted its first monthly profit in three years, a significant milestone given the division's sustained losses that have been a persistent competitive liability. [2] Samsung also began mass production of the PM1763 SSD optimized for next-generation AI infrastructure on 2026-07-08, and announced Galaxy Unpacked for 2026-07-22 in London to unveil new foldable devices. [1] (Company announcement — may reflect promotional framing.) The foundry pro…
AMD Positions for AI Infrastructure Competition With UK Investment and Upcoming Q2 Results
AMD committed up to £2 billion to accelerate AI innovation and research in the United Kingdom and announced a strategic collaboration with Imperial College London to advance AI-enabled scientific discovery and sovereign AI infrastructure. [12] AMD also signed a definitive agreement with Rackspace Technology for phased deployment of 30 MW of AMD AI compute, and was named 'Current Company to Beat' in the Gartner AI Vendor Race. AMD announced it will report fiscal Q2 2026 financial results, providi…
Imec Advances 2D-Material Transistors and Neuromorphic Technologies, Reinforcing European R&D Leadership
Imec's multi-front advanced technology push continued this period. The ASML, TSMC, and imec collaboration on 2D-material transistors at 50nm contacted poly pitch on 300mm wafers — achieving 94% operational transistors in a CMOS-like integration approach — remained a featured highlight, with TSMC's CTO describing the work as 'instrumental in pushing the boundaries of semiconductor innovation' and accelerating the lab-to-fab transition. [13] Imec also published a neuromorphic compressive telemetry…
Intel Foundry Signals Continued U.S. Manufacturing Commitment Ahead of Q2 Financial Results
Intel's newsroom highlighted its role in advancing U.S. innovation, AI, and manufacturing in a 2026-06-29 announcement framing Intel as central to American technology leadership. Intel also announced it will report Q2 2026 financial results on 2026-07-23, providing an upcoming data point on foundry revenue and advanced node progress. [15] Semiconductor Engineering's weekly review noted Intel expansion as a headline item alongside South Korea's AI investments and new fab openings. [20] Intel's po…
制度・規制動向
CHIPS Act R&D Disbursements Remain Active; CHIPS.gov Shows No New Agreements This Period
The CHIPS.gov source showed no new changes detected this week, indicating the previously reported agreements — I-Pulse ($250 million), SandboxAQ ($500 million), Coherent Corp. (up to $50 million), and Powerex ($30 million) — remain the most recent publicly listed disbursements. [16] The SIA applauded CHIPS Act incentives for Coherent in a 2026-06-16 press release. [17] The absence of new CHIPS.gov announcements this period does not indicate a slowdown — the program's cadence has been irregular —…
JEDEC Wide Bandgap Power Semiconductor Standards Continue Advancing With SiC and GaN Guidelines
JEDEC's JC-70 committee's recently published standards — JEP203 (Short Circuit Evaluation in Power Conversion Transistors, May 2026), JEP204 (Catalog of Stress Procedures for SiC Devices, May 2026), and JEP182 (Continuous-Switching Evaluation of GaN Power Conversion Devices, April 2026) — remained the most recent documents on the JC-70 page with no new publications this period. [18a] JEDEC also has an upcoming Industry Forum on AI Memory Architectures, Testing, and Ecosystem Readiness scheduled …
European Chips Act 2.0 Presented at SEMI Policy Forum, Reinforcing EU Semiconductor Sovereignty Push
The European Commission presented Chips Act 2.0 at the SEMI Europe Policy Forum to accelerate semiconductor innovation and investment, as reported by SEMI on 2026-06-03. [19] Imec's NanoIC pilot line is described as a pivotal initiative of the EU Chips Act to reinforce Europe's leadership in semiconductor innovation, and imec's collaboration with TU/e explicitly connects to EU Chips Act initiatives including the ChipNL Competence Center and the European Chip Design Platform. [14] The EU Chips Ac…
ソース活動
先週からの変化
Samsung Foundry Posts First Monthly Profit in Three Years
Samsung's chipmaking division reported its first monthly profit in three years, a significant competitive milestone that could reduce financial pressure on the division's advanced node investment capacity. Reported by AnySilicon on 2026-07-10. [2]
Samsung Begins Mass Production of PM1763 SSD for AI Infrastructure
Samsung announced on 2026-07-08 that it has begun mass production of the PM1763 SSD optimized for next-generation AI infrastructure, extending its storage product push into the data center AI segment alongside its previously announced UFS 5.0 on-device AI solution. [1] (Company announcement — may reflect promotional framing.)
Lateral HBM Stacking Research Reaches Prototype Stage With V-Die and MOSAIC Designs
Two research groups presented competing lateral HBM stacking architectures at the IEEE VLSI Symposium: South Korean researchers' V-Die predicts 82% speed boost over HBM4 and 540 tokens/second versus 296 for HBM4 on a GPT3-sized workload; Japan's MOSAIC targets twice HBM4 memory capacity with less than 1°C additional peak temperature. Prototype devices are in development. [3]
Global Semiconductor Sales Rose 9.2% Month-to-Month in May 2026
The SIA reported global semiconductor sales increased 9.2% month-to-month in May 2026, following an 11% month-to-month increase in April 2026, confirming a sustained demand recovery. WSTS Blue Book data through May 2026 is now available. [17] [7]
NVIDIA Vera CPU Introduced as New Category for Agentic AI Workloads
NVIDIA detailed the Vera CPU as a new 'max single-threaded CPU at scale' category built for agentic AI, featuring the Olympus core delivering 50% higher instructions per cycle than NVIDIA Grace, up to 1.2TB/s LPDDR5X memory bandwidth, and 3.4TB/s core-to-core bandwidth. Perplexity tested Vera completing a real coding workflow approximately 1.5x faster than x86. NVIDIA also announced its next-generation Rosa CPU with the Rigel core as the follow-on. [8] (Company announcement — may reflect promoti…
ウォッチリスト — 今後の締切
Samsung Galaxy Unpacked — London foldable device unveil
ソース: Samsung Newsroom Global — PM1763 SSD Mass Production for AI InfrastructureIntel Q2 2026 financial results report
ソース: Intel Newsroom — U.S. Manufacturing Commitment and Q2 2026 Results AnnouncementJEDEC Automotive Electronics Forum — Santa Clara
ソース: JEDEC — AI Memory Forum Seoul and Automotive Forum Santa ClaraJEDEC Industry Forum on AI Memory Architectures, Testing, and Ecosystem Readiness — Seoul
ソース: JEDEC — AI Memory Forum Seoul and Automotive Forum Santa Clara示唆・見るべき論点（10件）
- 1.Lateral HBM stacking — demonstrated at the IEEE VLSI Symposium with V-Die and MOSAIC designs — represents the most concrete near-term architectural threat to conventional HBM supply chains: if either design achieves production scale, HBM suppliers and advanced packaging houses face a structural transition that could render current vertical-stacking infrastructure partially obsolete [3].
- 2.Samsung's first monthly foundry profit in three years is a potential competitive inflection point: sustained profitability would restore the division's capacity to fund advanced node development, directly affecting TSMC's market share trajectory and Intel Foundry's ability to attract customers seeking alternatives — a dynamic worth monitoring across the next two to three earnings cycles [2].
- 3.NVIDIA's introduction of the Vera CPU for agentic AI workloads signals a deliberate move to own the full compute stack — CPU, GPU, networking, and software — creating a systems-level lock-in that is structurally harder to displace than individual GPU procurement relationships [8] (company announcement — may reflect promotional framing).
- 4.AMD's £2B UK commitment and Imperial College collaboration mirror NVIDIA's national AI strategy playbook almost exactly, suggesting AMD has identified government-backed sovereign AI infrastructure as the strategic battleground where it can compete on equal footing — geographies where NVIDIA's installed-base advantage is lowest will be the most contested [12] (company announcement — may reflect promotional framing).
- 5.The divergence of transistor stacking roadmaps — IBM, Intel, Samsung, and TSMC each choosing different paths — combined with the 2D-material transistor milestone achieved by ASML, TSMC, and imec collectively signals that the post-FinFET era will be characterized by heterogeneous device technology rather than a single successor node, increasing R&D risk for companies betting on a single architecture [4] [13].
- 6.India's approval of 12 semiconductor projects worth $17.2 billion, alongside South Korea's AI-focused investments and a new Dresden power fab, indicates the geographic diversification of semiconductor demand is accelerating — foundries and equipment suppliers should model capacity allocation scenarios that account for government-mandated domestic sourcing requirements in multiple major economies [2].
- 7.NVIDIA's software compounding strategy — 5x token cost reduction on DeepSeek V4 in one month, 20x throughput improvement through stacked optimizations — illustrates that inference economics are improving faster than hardware refresh cycles, creating a moving target for competitors who cannot match the CUDA ecosystem's continuous optimization flywheel [9] (company announcement — may reflect promotional framing).
- 8.The EU Chips Act 2.0 presentation at the SEMI Europe Policy Forum, combined with imec's NanoIC pilot line and TU/e collaboration under the ChipNL Competence Center, indicates European semiconductor sovereignty efforts are maturing from investment commitments into operational R&D infrastructure — the Eindhoven–Leuven corridor is emerging as a defined geography for post-silicon transistor research [19] [13].
- 9.The consecutive monthly sales growth (11% April, 9.2% May 2026) reported by the SIA and corroborated by WSTS data, occurring alongside SEMI's record $50B+ memory equipment investment projection for 2026, creates a demand-supply expansion scenario: supply-side capacity waves typically lag demand signals by 18–36 months, raising the probability of memory pricing pressure in the 2028–2030 window [17] [7].
- 10.Semiconductor Engineering's framing of AI scaling as a 'Moore's Law for the Intelligence Era' and its coverage of agentic AI's impact on EDA and verification methodologies indicates that design tool vendors — not just chip manufacturers — face structural disruption; EDA companies that fail to integrate agentic AI into their workflows risk displacement by AI-native design automation entrants [20].
信頼度サマリー
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参照ソース一覧
Samsung began mass production of the PM1763 SSD optimized for next-generation AI infrastructure on 2026-07-08, extending its data center AI storage push. Also announced Galaxy Unpacked for 2026-07-22 in London. (Company announcement — may reflect promotional framing.)
AnySilicon reported Samsung's foundry division posted its first monthly profit in three years, India greenlighted 12 semiconductor projects worth $17.2 billion, May 2026 global semiconductor sales rose 9.2% month-to-month, and South Korea is going 'all in on AI.'
IEEE VLSI Symposium presentations: South Korean V-Die design predicts 82% speed boost over HBM4 and 540 tokens/second vs. 296 for HBM4 on GPT3-sized workloads; Japan's MOSAIC targets twice HBM4 capacity with less than 1°C additional peak temperature. Prototype devices in development.
IEEE Spectrum reported IBM is diverging from Intel, Samsung, and TSMC on transistor stacking plans. Records also fell for 3D chip hybrid-bonding technology enabling millions more connections between chips.
IEEE Spectrum continued to feature the UCLA $125M semiconductor hub with Applied Materials, GlobalFoundries, Meta, Synopsys, and Broadcom as a model for compressing the academia-to-fab feedback loop, noting frontier AI models update every few months while semiconductor parts update on 18- to 48-month cycles.
SIA reported global semiconductor sales increased 9.2% month-to-month in May 2026, following an 11% month-to-month increase in April 2026, confirming sustained demand recovery.
WSTS Blue Book updated through May 2026 provides underlying data supporting the consecutive monthly global semiconductor sales growth reported by SIA.
NVIDIA detailed the Vera CPU for agentic AI: Olympus core with 50% higher IPC than NVIDIA Grace, up to 1.2 TB/s LPDDR5X bandwidth, 3.4 TB/s core-to-core bandwidth; next-generation Rosa CPU with Rigel core announced as follow-on. Perplexity tested Vera at ~1.5x faster than x86 on a coding workflow. (Company announcement — may reflect promotional framing.)
NVIDIA reported Blackwell inference software stack reduced token costs by up to 5x on DeepSeek V4 in one month; stacked optimizations increase throughput by up to 20x. (Company announcement — may reflect promotional framing.)
NVIDIA Nemotron 3 Ultra achieved benchmark-leading performance with LangChain's Deep Agents harness at 10x lower inference cost per run than leading closed models with no model retraining required. (Company announcement — may reflect promotional framing.)
NVIDIA documented sovereign AI factory deployments across Europe, Asia, and Latin America, with the AI Nations initiative active since 2019. (Company announcement — may reflect promotional framing.)
AMD committed up to £2 billion to AI innovation and research in the UK, announced Imperial College London strategic collaboration for sovereign AI, signed Rackspace Technology agreement for 30 MW AMD AI compute, and was named 'Current Company to Beat' by Gartner. Q2 2026 financial results forthcoming. (Company announcement — may reflect promotional framing.)
ASML, TSMC, and imec demonstrated 2D-material transistors (MoS2, WS2, WSe2) at 50nm contacted poly pitch on 300mm wafers with 94% operational transistors in a CMOS-like integration approach — described as a world first. TSMC's CTO characterized the work as instrumental in pushing the boundaries of semiconductor innovation.
Imec formalized a strategic collaboration with TU/e explicitly aligned with EU Chips Act initiatives including the ChipNL Competence Center and European Chip Design Platform.
Intel's newsroom highlighted its role in advancing U.S. innovation, AI, and manufacturing, and announced it will report Q2 2026 financial results on 2026-07-23. (Company announcement — may reflect promotional framing.)
CHIPS.gov showed no new agreements this period. Previously reported agreements — I-Pulse ($250M), SandboxAQ ($500M), Coherent Corp. (up to $50M), and Powerex ($30M) — remain the most recent publicly listed disbursements.
SIA applauded CHIPS Act incentives for Coherent in a 2026-06-16 press release, reinforcing SIA's ongoing policy advocacy across trade, tax, talent, and export control.
JEDEC announced an Industry Forum on AI Memory Architectures, Testing, and Ecosystem Readiness in Seoul on 2026-10-15 and an Automotive Electronics Forum in Santa Clara on 2026-09-17. Wide bandgap standards (JEP203, JEP204, JEP182) remain the most recent JC-70 publications with no new additions this period.
The European Commission presented Chips Act 2.0 at the SEMI Europe Policy Forum to accelerate semiconductor innovation and investment. Imec's NanoIC pilot line is described as a pivotal initiative of the EU Chips Act.
Semiconductor Engineering's special report 'Creating A Moore's Law For AI Scaling' frames AI scaling as the grand challenge of the Intelligence Era; sustained coverage of agentic AI's impact on chip design and verification confirms R&D model transformation is broadening into EDA and IP.