Semiconductor & Chip Industry — 2026年9月21日 週次レポート
Semiconductor & Chip Industryのニュース＆アップデート — すべての記述に一次ソースのリンク付き。
重要な発見
エグゼクティブサマリー（4件）
- •The week's central story is the crystallization of AI inference economics as the primary competitive battleground: NVIDIA's Vera Rubin NVL72 MLPerf debut, AMD's record-setting MI350 submission, and Intel's software optimization gains all arrived simultaneously, while OpenAI's Jalapeño chip — designed with LLMs in under 20 months — signals that the custom silicon competitive field is expanding beyond traditional semiconductor companies. The inference performance race is now multi-dimensional, mea…
- •Power grid integration has emerged as a new semiconductor industry frontier: the AEMA launch, NVIDIA DSX MaxLPS validation showing 24% throughput gains within fixed power budgets, and Silicon Valley Power's 200+ successful demand signals to NVIDIA's Eos AI factory collectively indicate that AI factories are transitioning from passive electricity consumers to active grid participants. This shift has direct implications for data center siting, interconnection timelines, and the regulatory framewor…
- •The High NA EUV ecosystem consolidation from the prior period is now entering a production validation phase: Intel Foundry's report of over one million wafers processed, Samsung's 2028 DRAM commitment, and imec's resist chemistry advances together indicate the technology is crossing the threshold from early adoption to broad manufacturing readiness — a transition that will reshape foundry competitive dynamics over the 2027-2030 timeframe.
- •Memory is being co-designed with AI accelerators rather than treated as a commodity: Micron's ultra-dense server module, SK hynix's HBF/PIM/SALT-KV portfolio presentation, Amazon's NVHBM collaboration with NVIDIA, and SK hynix Ventures' launch all point to a structural shift where memory companies are becoming AI infrastructure platform players rather than component suppliers — a repositioning with significant implications for pricing power and customer relationships.
今回の要点（15件）
- 1.NVIDIA Vera Rubin NVL72 debuted in MLPerf Inference v6.1 on September 16, 2026 with up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL and up to 2.5x on DeepSeek-R1, with 99% scaling efficiency demonstrated across 288 GPUs [1a].
- 2.AMD set a new MLPerf record of 5.75M tokens/sec at 512-GPU scale with Instinct MI350 Series GPUs, with partner results within 4% of AMD on average [6].
- 3.Emerald AI, Google, and NVIDIA launched the AI Energy Management Alliance (AEMA) on September 16, 2026 to advance grid-responsive AI data centers [1b].
- 4.NVIDIA DSX MaxLPS enabled Lambda to achieve 24% more cluster-wide token throughput and 23% better performance per watt within the same power budget, validated on NVIDIA HGX B200 GPU Servers [1c].
- 5.IEEE Spectrum reported on September 14, 2026 that OpenAI designed its Jalapeño AI accelerator using its own LLMs, moving from first architecture concept to first silicon in under 20 months with a team averaging fewer than 100 people [2].
- 6.OpenAI's Jalapeño delivers up to 13.4 petaflops of 4-bit compute, 232 gigabytes of memory at 15.4 terabytes per second, and benchmarks cited by OpenAI show up to 3.6x lower end-to-end latency than NVIDIA GB300 [2].
- 7.SK hynix launched 'SK hynix Ventures' in Silicon Valley on September 18, 2026 to expand global AI ecosystem investment [11].
- 8.SK hynix presented a 'New Spectrum' for AI infrastructure at the AI Infra Summit 2026 on September 17, 2026, covering HBF, PIM, eSSD, and SALT-KV technologies [11].
- 9.Micron announced the world's first ultra-dense module for next-generation servers on September 15, 2026 [15].
- 10.Amazon's Annapurna Labs was reported to be working with NVIDIA on NVHBM custom high-bandwidth memory technology at the AI Infra Summit [14].
- 11.GlobalFoundries expanded its collaboration with Marvell for next-generation optical connectivity on September 17, 2026, and BAE Systems received $16 million to qualify GF's RH45 technology for radiation-hardened space missions [13].
- 12.SEMI joined the ReSiLient Consortium on September 14, 2026 to strengthen Europe's silicon and silicon carbide raw material value chains [7].
- 13.The European Commission's European Chips Act policy page expanded with localized versions across all EU member state languages between September 14-16, 2026, confirming Chips Act 2.0 was proposed in June 2026 [16].
- 14.CHIPS.gov added multiple new topic pages on September 17, 2026 covering biotechnology, cybersecurity, AI, energy, advanced communications, and other strategic technology areas [10].
- 15.Salesforce's Koa CRM reasoning model was built by post-training NVIDIA Nemotron 3 Super, announced at Dreamforce on September 15, 2026, with general availability expected winter 2026 [1d].
市場動向
AI Inference Performance Race Intensifies With MLPerf v6.1 Results
The week's MLPerf Inference v6.1 results crystallized a new competitive dynamic: NVIDIA's Vera Rubin NVL72 debuted with up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL and up to 2.5x on DeepSeek-R1, while GB300 NVL72 achieved 99% scaling efficiency across four racks (288 GPUs) [1a] (company announcement — may reflect promotional framing). AMD simultaneously reported a new MLPerf record of 5.75M tokens/sec at 512-GPU scale with Instinct MI350 Series GPUs, with partner results within 4% …
AI Factory Power Constraint Drives Grid-Integration Innovation
A new category of AI infrastructure management emerged this week: grid-responsive AI factories. NVIDIA's DSX MaxLPS enabled Lambda to run 19 nodes within the same power budget as 16 full-power nodes, achieving 24% more cluster-wide token throughput and 23% better performance per watt [1c] (company announcement — may reflect promotional framing). Emerald AI, Google, and NVIDIA launched the AI Energy Management Alliance (AEMA) on September 16, 2026, a coalition to advance data centers that dynamic…
LLM-Accelerated Chip Design Compresses Development Timelines
IEEE Spectrum reported on September 14, 2026 that OpenAI used its own LLMs to design its Jalapeño AI accelerator chip, moving from first architecture concept to first silicon in under 20 months, with only nine months from first RTL to tapeout [2]. The chip delivers up to 13.4 petaflops of 4-bit compute, accesses 232 gigabytes of memory at 15.4 terabytes per second, and benchmarks cited by OpenAI show up to 3.6x lower end-to-end latency than NVIDIA's GB300. Experts quoted by IEEE Spectrum noted t…
High NA EUV Ecosystem Matures With Resist and Photomask Advances
imec's demonstration of chemically amplified resist extension for High NA EUV single patterning of 22nm pitch line structures continued to be highlighted across the reporting period [4]. Intel Foundry and ASML's collaboration on High NA EUV industry readiness, announced September 8, 2026, reported more than one million wafers processed to date across certification, R&D, and volume production on select layers for Intel Core Ultra Series 3 processors [5]. Samsung's commitment to introduce High NA …
Memory Innovation Accelerates for AI Infrastructure Demands
Micron announced on September 15, 2026 the world's first ultra-dense module for next-generation servers [15] (company announcement — may reflect promotional framing). SK hynix launched 'SK hynix Ventures' in Silicon Valley on September 18, 2026 to expand global AI ecosystem investment [11] (company announcement — may reflect promotional framing), and presented a 'New Spectrum' for AI infrastructure at the AI Infra Summit on September 17, 2026 covering HBF, PIM, and SALT-KV technologies. Amazon's…
競合動向
NVIDIA Vera Rubin Platform Establishes New AI Factory Performance Baseline
NVIDIA's Vera Rubin NVL72 debuted in MLPerf Inference v6.1 with up to 3.7x higher throughput than GB300 NVL72, and in the SemiAnalysis AgentX benchmark delivered 30x better performance than GB300 NVL72 in preview testing [1a] (company announcement — may reflect promotional framing). NVIDIA also announced that DSX MaxLPS can enable up to 40% more GPU capacity for Vera Rubin NVL72 AI factories within the same megawatt budget, and that the combined Vera Rubin and Groq 3 LPX platform delivers up to …
OpenAI Enters Custom Silicon Competition With Jalapeño Accelerator
OpenAI fully unveiled its Jalapeño AI accelerator chip on August 25, 2026, with IEEE Spectrum providing detailed analysis on September 14, 2026 [2]. Jalapeño pairs its compute die with six stacks of HBM4 and an I/O chiplet, delivering up to 13.4 petaflops of 4-bit compute and 15.4 terabytes per second of memory bandwidth. Benchmarks cited by OpenAI show up to 3.6x lower end-to-end latency than NVIDIA's GB300 while consuming less power. The chip was designed with a team averaging fewer than 100 p…
AMD Demonstrates Competitive MLPerf Scale and Ecosystem Breadth
AMD reported its broadest MLPerf Inference submission yet with Instinct MI350 Series GPUs, setting a new record of 5.75M tokens/sec at 512-GPU scale, with GPT-OSS-120B leadership at 8 and 72 GPUs, and partner results within 4% of AMD on average [6] (company announcement — may reflect promotional framing). AMD also published analysis on September 18, 2026 positioning AMD EPYC CPUs as delivering for every layer of the agentic AI stack [6]. F-Secure and AMD Silo AI announced on September 14, 2026 a…
SK Hynix Expands AI Ecosystem Investment and Ventures Strategy
SK hynix launched 'SK hynix Ventures' in Silicon Valley on September 18, 2026 to expand global AI ecosystem investment, targeting AI data center and AI ecosystem companies [11] (company announcement — may reflect promotional framing). SK hynix also presented a 'New Spectrum' for AI infrastructure at the AI Infra Summit 2026 on September 17, 2026, covering HBF, PIM, eSSD, and SALT-KV technologies. SK hynix separately issued a factual clarification on September 16, 2026 stating no plans have been …
GlobalFoundries Expands Silicon Photonics and Optical Connectivity Partnerships
GlobalFoundries announced on September 17, 2026 an expanded collaboration with Marvell for next-generation optical connectivity [13] (company announcement — may reflect promotional framing). BAE Systems received $16 million to qualify GlobalFoundries' RH45 technology for radiation-hardened space missions on September 16, 2026 [13]. These announcements follow GlobalFoundries' $375M CHIPS Act quantum award and $300M silicon photonics letter of intent from the prior period. GlobalFoundries is syste…
制度・規制動向
European Chips Act 2.0 Policy Pages Expand Across All EU Languages
The European Commission's European Chips Act policy page expanded significantly this week with new localized versions appearing across all EU member state languages including Bulgarian, Czech, Danish, Spanish, Estonian, French, German, Greek, Irish, Croatian, and others between September 14-16, 2026 [16]. Each localized page confirms that the Chips Act 2.0 was proposed by the Commission in June 2026 and introduces new measures to further boost the chips industry, reduce strategic dependencies, a…
CHIPS.gov Expands Topic Coverage Across Strategic Technology Areas
CHIPS.gov added multiple new topic pages on September 17, 2026 covering biotechnology, cybersecurity and privacy, artificial intelligence, energy, advanced communications, electronics, chemistry, buildings and construction, and publications [10]. The main CHIPS.gov page continues to highlight finalized awards including up to $1 billion to Anderon (a newly formed IBM subsidiary), and up to $100 million each to Quantinuum, Rigetti, and D-Wave [10]. The expansion of topic coverage across strategic …
SEMI Joins ReSiLient Consortium for European Silicon and SiC Supply Chains
SEMI announced on September 14, 2026 that it joined the ReSiLient Consortium to strengthen Europe's silicon and silicon carbide raw material value chains [7]. SEMI also published a standards update on September 15, 2026 covering major revisions, task force expansion, and responses to growing industry requirements [7]. The ReSiLient Consortium membership signals that the semiconductor industry association is actively working to address raw material supply chain vulnerabilities that underpin both …
ソース活動
先週からの変化
NVIDIA Vera Rubin NVL72 MLPerf Debut Sets New Inference Benchmark
NVIDIA's Vera Rubin NVL72 made its MLPerf Inference v6.1 debut on September 16, 2026, delivering up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL and up to 2.5x on DeepSeek-R1, while GB300 NVL72 achieved 99% scaling efficiency across 288 GPUs. Software optimizations alone delivered up to 1.6x performance improvement over v6.0. [1a]
AI Energy Management Alliance Launched by Emerald AI, Google, and NVIDIA
Emerald AI, Google, and NVIDIA announced the launch of the AI Energy Management Alliance (AEMA) on September 16, 2026, a first-of-its-kind coalition advancing data centers that dynamically manage electricity use in response to grid conditions. NVIDIA's Eos AI factory demonstrated automated load reduction responding to over 200 demand signals from Silicon Valley Power. [1b]
OpenAI Jalapeño Custom AI Chip Design Process Detailed by IEEE Spectrum
IEEE Spectrum reported on September 14, 2026 that OpenAI designed its Jalapeño AI accelerator using its own LLMs, moving from first architecture concept to first silicon in under 20 months with a team averaging fewer than 100 people. Jalapeño delivers up to 13.4 petaflops of 4-bit compute and 15.4 TB/s memory bandwidth, with benchmarks showing up to 3.6x lower latency than NVIDIA GB300. [2]
SK Hynix Launches Silicon Valley Venture Capital Arm
SK hynix launched 'SK hynix Ventures' in Silicon Valley on September 18, 2026 to expand global AI ecosystem investment, targeting AI data center and AI ecosystem companies. This follows the Indiana fab groundbreaking from the prior period and the 2026 Future Forum technology direction announcement. [11]
ウォッチリスト — 今後の締切
Micron Technology fiscal fourth quarter results announcement
ソース: Micron Newsroom — Ultra-Dense Module for Next-Generation Servers, Deirdre Hanford AppointmentJEDEC Industry Forum on AI Memory Architectures, Testing, and Ecosystem Readiness — Seoul
ソース: imec — High NA EUV Resist Extension, Superconducting Technology, CFET RoadmapNVIDIA GTC Berlin registration open — event October 20-22
ソース: NVIDIA Blog — Vera Rubin MLPerf, AEMA, DSX MaxLPS, Dreamforce, Skild AI示唆・見るべき論点（7件）
- 1.NVIDIA's DSX MaxLPS achieving 24% more token throughput within the same power budget — equivalent to running 19 nodes on a 16-node power allocation — represents a software-defined capacity expansion that does not require new power infrastructure. If this scales to the projected 40% GPU capacity increase for Vera Rubin NVL72 factories, it could defer billions in data center power infrastructure investment while simultaneously increasing NVIDIA's software revenue.
- 2.OpenAI's Jalapeño design process — fewer than 100 people, under 20 months, LLM-accelerated — establishes a new template for hyperscaler custom silicon that is accessible to companies without traditional semiconductor engineering organizations. The implication is that the custom silicon competitive field will expand rapidly as LLM-assisted design tools mature, potentially commoditizing chip design services while concentrating value in the underlying LLM tools.
- 3.SK hynix's simultaneous Indiana fab investment, Silicon Valley venture capital launch, and AI Infra Summit technology portfolio presentation represents a deliberate strategy to convert HBM manufacturing leadership into a broader AI ecosystem position before competitors close the memory technology gap. The venture arm gives SK hynix visibility into emerging AI workload requirements that can inform its memory architecture roadmap — a feedback loop that DRAM competitors without similar ecosystem ac…
- 4.The AEMA's technology-neutral, performance-based framework — focusing on measurable grid services rather than specific hardware — is designed to create faster interconnection pathways for AI factories that commit to grid flexibility. If adopted by utilities and grid operators, this framework could give NVIDIA DSX-equipped facilities a regulatory advantage in securing power connections, creating a new dimension of competitive differentiation beyond chip performance.
- 5.Amazon's Annapurna Labs working with NVIDIA on NVHBM custom high-bandwidth memory is significant because it suggests Amazon is pursuing a co-design strategy for memory that mirrors its custom silicon strategy with Trainium and Inferentia. If NVHBM becomes a production technology, it could give Amazon a memory bandwidth advantage in its own AI infrastructure that is not available to competitors using standard HBM.
- 6.The European Chips Act 2.0 policy page expansion across all EU languages in a single week signals active legislative communication preparation, likely ahead of formal Council and Parliament proceedings. The documentation of over EUR 32 billion in approved State aid across 18 decisions provides the political foundation for Chips Act 2.0 funding requests — the multilingual rollout suggests the Commission is building public and member state awareness before formal legislative debate.
- 7.Semiconductor Engineering's coverage of package digital twins being hard to build because models need synchronization with what manufacturing actually builds points to an emerging bottleneck in advanced packaging yield improvement. As multi-die assemblies dominate at 2nm and below, the inability to accurately model package behavior before manufacturing creates yield risk that could slow the adoption of chiplet architectures — a challenge that benefits companies with the most manufacturing data.
信頼度サマリー
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参照ソース一覧
Vera Rubin NVL72 MLPerf Inference v6.1 debut with up to 3.7x throughput vs GB300 NVL72; AEMA launch with Emerald AI and Google; DSX MaxLPS 24% throughput gain validated by Lambda; Salesforce Koa built on Nemotron 3 Super; Skild AI S1 robot foundation model on NVIDIA infrastructure.
OpenAI used its own LLMs to design Jalapeño AI accelerator chip in under 20 months with fewer than 100 people; Jalapeño delivers 13.4 petaflops 4-bit compute, 15.4 TB/s memory bandwidth, up to 3.6x lower latency than NVIDIA GB300; Broadcom handled physical design.
AI data centers have stranded power problem from redundant feeds; hardware-software co-design in AI era; scaling thermal analysis from transistors to data centers; package digital twins hard to build; Silicon Heartland chip powerhouse analysis.
Extension of chemically amplified resists for High NA EUV single patterning of 22nm pitch line structures; world-first NbTiN circuits and 30nm interconnects for scalable superconducting technology; CFET device roadmap advancing with novel integration modules.
Intel Foundry and ASML report over one million wafers processed with High NA EUV; Samsung plans DRAM High NA EUV by 2028 and joins 12-inch photomask initiative; both collaborations announced September 8, 2026.
AMD Instinct MI350 Series sets new MLPerf record of 5.75M tokens/sec at 512-GPU scale; AMD EPYC CPUs positioned for every layer of agentic AI stack; F-Secure and AMD Silo AI collaboration for secure agentic AI journeys.
SEMI joins ReSiLient Consortium to strengthen Europe's silicon and SiC raw material value chains on September 14, 2026; SEMI standards update covering major revisions and task force expansion on September 15, 2026; SEMICON India 2026 September 17-19.
Samsung begins official rollout of One UI 9 on September 16, 2026; Samsung and ASML expanded strategic collaboration for High NA EUV and 12-inch photomask transition remains active; Samsung and Mistral AI strategic partnership for semiconductor infrastructure.
Intel software optimizations boost AI inference in MLPerf v6.1 on September 16, 2026; Intel publishes analysis on disaggregation moving from tokens to frames on September 15, 2026; Intel Foundry and ASML High NA EUV collaboration highlighted.
CHIPS.gov added topic pages for biotechnology, cybersecurity, AI, energy, advanced communications, electronics, chemistry, buildings and construction, and publications on September 17, 2026; finalized R&D award of up to $1 billion to Anderon (IBM subsidiary); finalized awards to Quantinuum, Rigetti, D-Wave.
SK hynix launches SK hynix Ventures in Silicon Valley on September 18, 2026 for global AI ecosystem investment; presents New Spectrum for AI infrastructure at AI Infra Summit 2026 on September 17, 2026 covering HBF, PIM, eSSD, SALT-KV; factual clarification on Intel memory production talks.
NVIDIA Vera Rubin NVL72 delivers leading performance in MLPerf Inference v6.1 debut; Emerald AI, Google and NVIDIA launch AEMA; NVIDIA expands open source CUDA-Q platform with CUDA-Q Logical for fault-tolerant quantum computing on September 14, 2026.
GlobalFoundries and Marvell expand collaboration for next-generation optical connectivity on September 17, 2026; BAE Systems receives $16 million to qualify RH45 technology for radiation-hardened space missions on September 16, 2026; GCRAM technology with RAAAM achieving 40% area shrink and up to 60% power reduction vs SRAM.
AI Infra Summit keynote by Ian Buck covering DSX MaxLPS 24% throughput gain by Lambda; Amazon Annapurna Labs working with NVIDIA on NVHBM custom HBM; d-Matrix integrating with NVLink Fusion; Pinterest using Blackwell and Dynamo for conversational AI.
Micron advances memory innovation with world's first ultra-dense module for next-generation servers on September 15, 2026; Micron appoints Deirdre Hanford to lead Micron Research Labs on September 15, 2026; Micron Technology to report fiscal fourth quarter results on September 30, 2026.
European Chips Act policy page expanded with localized versions across all EU member state languages between September 14-16, 2026; Chips Act 2.0 proposed June 2026 confirmed; over EUR 32 billion in approved State aid across 18 State aid decisions documented.
Samsung plans to introduce High NA EUV into DRAM high-volume manufacturing for first time in industry by 2028; Samsung joins 12-inch photomask industry initiative; collaboration covers advanced memory and innovative manufacturing approaches.
Texas Instruments increases quarterly cash dividend 7% from $1.42 to $1.52 per share ($6.08 annualized) on September 17, 2026, marking 23 consecutive years of increases.
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